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Phase change memory technology changes design boundaries, constraints
Newest memory technology promises improve time-to-market, interface issues of NAND, NOR flash memory



EE Times
It's not news that IC memory technology is a major driver for IC process and end-user products, and today's casual use of gigabyte-class capacities in mundane consumer products is solid evidence of that reality. At the Embedded Systems Conference in Boston, Glen Hawk, VP/General Manager of the Embedded Business Group at Numonyx, explained how changes in memory technologies impact designers and products, and how the coming reality of phase change memory will, yet again, change the design tradeoffs at both the prototyping stage and for final products. [While Numonyx is just an 18-month-old company, formed from spin-outs of Intel and STMicroelectronics supplemented by funding from Francisco Partners, they are the third-largest vendor of flash devices, he noted.].

Hawk walked through non-volatile solid-state memory milestones, starting with metal-masked ROM, then EPROM (UV-erasable), then NOR-based flash and NAND-based flash memories (no mention of magnetic core, sorry), looking at the key attributes of each, in terms of cost, write speed, read speed, density, erase mode and time, among other factors. He noted that regardless of feature size, there is a cost floor for the two flash memory approaches, due to their need for internal overhead for functions as charge pumps, error correction circuitry, and I/O. In the case of NAND, he cited $2 as the floor, while it's around $0.50 for NOR. There's also a production window to consider, where your volume and low-cost needs overlap the peak of the production and cost-efficiency curve at the memory vendors.

Despite the fascinating and clear presentation on the flash-memory world, Hawk reserved a major part of his keynote to look at what he says is the next game-changer for designers: phase change memory (PCM). Unlike previous technologies, which use captured and controlled electrons in some way (with fewer and fewer available with each process shrink, to the point of on-the-edge unreliability at the bit level). PCM stores bits by transitioning between amorphous and crystalline states of relatively common chalcogenide glass, which is a tangible, a physical property.

He rated PCM as positive in terms of bit alterability, scalability, read speed, software-related complexity, and endurance. But it is not all positive: he noted concerns about the cost-per-bit and write speed. He suggested that designers start, as they did with EPROM "back in the day", by using PCM for the prototypes, where there is an immediate savings in time to reprogram due to its bit-level alterability (in contrast to the block erasability of NOR and program page eras ability of NAND). For a 512 Mbyte memory, he noted, typical "reflash" time drops from between 3 and 4 minutes to about 30 seconds. What hard-pressed designer, up against deadline and struggling with a cranky prototype that needs serious debugging, couldn't use that gain? ♦

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